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| Product Brief PE42693 DIE SP9T UltraCMOSTM 2.75 V Switch 100 - 3000 MHz, +68 dBm IIP3 Figure 1. Functional Diagram Features * Two GSM/PCS/EDGE compliant TX WCDMA TRX1 TRX3 WCDMA * WCDMA TRX2 RX1 * * * * * * * GSM/EDGE TX1 RX2 GSM/EDGE TX2 RX3 RX4 CMOS Control Driver and ESD V4 V3 V2 V1 ports, three TRX ports (WCDMA band or receive), and four RX ports Four pin CMOS logic control with integral decoder/driver Exceptional harmonic performance: 2fo = -87 dBc and 3fo = -76 dBc Low TRX insertion loss: 0.7 dB at 900 MHz, 0.9 dB at 1900 MHz TX - RX Isolation of 51 dB at 900 MHz, 45 dB at 1900 MHz 1500 V HBM ESD tolerance all ports +68 dBm IIP3 @ 50 -110 dBm IMD3 No blocking capacitors required Figure 2. Die Top View TRX1 26 27 Product Description 1 ANT TRX3 GND TRX2 25 24 28 2 GND RX1 GND RX2 GND RX3 GND RX4 GND ANT 3 4 5 GND TX1 23 22 29 ANT 6 7 GND TX2 30 21 20 31 ANT 8 9 10 ANT GND 19 18 17 16 15 14 13 12 11 Note: Redundant antenna pads for flexible impedance matching Figure 3. Package Type: Wirebond Die The PE42693 is a HaRPTM-enhanced SP9T RF Switch developed on the UltraCMOSTM process technology. It addresses the specific design needs of the Quad-Band GSM Handset Antenna Switch Module Market for use in GSM/ PCS/EDGE/DCS/WCDMA handsets. The switch is comprised of two transmit ports that can be used for GSM/PCS/EDGE, three transmit/receive ports (TRX1, TRX2 and TRX3) that can be used for either WCDMA or as receive ports, and four symmetric receive ports. An on-chip CMOS decode logic facilitates fourpin low voltage CMOS control. High ESD tolerance of 1500 V at all ports, no blocking capacitor requirements, and on-chip SAW filter over-voltage protection devices make this the ultimate in integration and ruggedness. Peregrine's HaRPTM technology enhancements deliver high linearity and exceptional harmonics performance. It is an innovative feature of the UltraCMOSTM process, providing performance superior to GaAs with the economy and integration of conventional CMOS. GND VDD V3 V4 GND V2 Document No. 70-0231-01 www.psemi.com Contact sales@psemi.com for full version of datasheet GND V1 (c)2007 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 4 PE42693 Product Brief Table 1. Target Electrical Specifications @ +25 C, VDD = 2.75 V (ZS = ZL = 50 ) Parameter TRX - Ant (850 WCDMA) TRX - Ant (1950 / 2140 WCDMA) TX - Ant (850 / 900) TX - Ant (1800 / 1900) RX - Ant (850 / 900) RX - Ant (1800 / 1900) All Ports in On State TX - RX (850 / 900) TX - RX (1800 / 1900) TRX - RX (850 / 900) TRX - RX (2200) TX - TRX (850 / 900) TX - TRX (2200) TX - TX (850 / 900) TX - TX (1800 / 1900) TX 850/900 MHz, +35 dBm output power, 50 TX 1800/1900 MHz, +33 dBm output power, 50 TX 850/900 MHz, +35 dBm output power, 50 TX 1800/1900 MHz, +33 dBm output power, 50 TRX - Measured in a 50 system at 2.14 GHz at the TX1 port. Input signals are referenced to the ANT port with +20 dBm CW signal at 1.95 GHz and -15 dBm CW signal at 1.76 GHz TRX - Measured in a 50 system at 2.14 GHz at the TX1 port. Input signals are referenced to the ANT port with +20 dBm CW signal at 1.95 GHz and -15 dBm CW signal at 1.76 GHz 50% of control to (10/90%) RF Condition Typ 0.7 0.8 / 0.9 0.7 0.85 1.1 1.25 20 51 45 43 34 34 28 31 26 -87 -86 -76 -77 -110 Units dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dBc dBc dBc dBc dBm Insertion Loss1 Return Loss Isolation 2nd Harmonic2 3rd Harmonic2 WCDMA Band I IMD3 WCDMA Band I IIP3 Switching time +68 2 dBm s Notes: 1. Insertion loss specified with optimal ANT impedance matching with the outermost ANT bondpad. 2. Pulsed RF input duty cycle of 50% and 4620 s, measured per 3GPP TS 45.005. Note: All datasheet parameters are tested and specified using only the antenna pad connection closest to edge of the die. Additional antenna pad connections have been added to allow customers to select different wirebond lengths which can be used to optimize performance. Table 2. Operating Ranges Parameter Temperature range VDD Supply Voltage IDD Power Supply Current (VDD = 2.6V) TX input power3 (VSWR 3:1) RX input power3 (VSWR 3:1) Control Voltage High Control Voltage Low Table 3. Absolute Maximum Ratings Max Units +85 2.75 13 3.2 20 +35 +20 1.4 0.4 C V TST Storage temperature range Operating temperature range TX input power (50 ) 4,5 4,5 Symbol Min Typ TOP VDD IDD PIN PIN VIH VIL -40 2.65 Symbol VDD VI Parameter/Conditions Power supply voltage Voltage on any DC input Min -0.3 -0.3 -65 -40 Max 4.0 VDD+ 0.3 +150 +85 +38 +35 +23 Units V V C C A dBm dBm V TOP PIN(50 ) TRX input power (50 ) RX input power (50 ) PIN ( :1) V dBm 4,5 4,5 TX input power (VSWR :1) +35 dBm +32 1500 100 V V TRX input power (VSWR :1)4,5 ESD Voltage (HBM, MIL_STD 883 Method 3015.7) ESD Voltage (MM, JEDEC, JESD22-A114-B) Note: 3. Pulsed RF input duty cycle of 50% and 4620 s, measured per 3GPP TS 45.005. VESD Part performance is not guaranteed under these conditions. Exposure to absolute maximum conditions for extended periods of time may adversely affect reliability. Stresses in excess of absolute maximum ratings may cause permanent damage. (c)2007 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 4 Notes: 4. Pulsed RF input duty cycle of 50% and 4620 s, measured per 3GPP TS 45.005. 5. V DD within operating range specified in Table 2. Document No. 70-0231-01 UltraCMOSTM RFIC Solutions Contact sales@psemi.com for full version of datasheet PE42693 Product Brief Table 4. Pin Descriptions Pad # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Figure 4. Pad Configuration (Top View) TRX1 26 27 Pad Name TRX37 GND6 RX17 GND RX2 6 7 Description RF I/O - TRX3 Ground RF I/O - RX1 Ground RF I/O - RX2 Ground RF I/O - RX3 Ground RF I/O - RX4 Ground Switch control input, CMOS logic level Ground 18 17 ANT 1 TRX3 GND TRX2 25 24 28 2 GND RX1 GND RX2 GND RX3 GND RX4 GND ANT 3 4 5 GND TX1 23 22 29 ANT 6 7 GND6 RX37 GND6 RX47 GND6 V1 8 GND TX2 30 21 20 31 ANT 8 9 10 ANT GND 19 GND6 V28 V38 GND6 V48 VDD8 GND6 GND6 TX27 GND6 TX17 GND6 TRX27 GND6 TRX17 ANT9 ANT9 ANT9 ANT9 ANT9 GND VDD V3 V4 GND V2 Switch control input, CMOS logic level Ground Switch control input, CMOS logic level Supply Ground Ground RF I/O - TX2 Ground RF I/O - TX1 Ground RF I/O - TRX2 Ground RF I/O - TRX1 RF Common - Antenna RF Common - Antenna RF Common - Antenna RF Common - Antenna RF Common - Antenna Table 5. Truth Table Path RX1-ANT RX2-ANT RX3-ANT RX4-ANT TX1-ANT TX2-ANT TRX1-ANT TRX2-ANT TRX3-ANT ALL Off Note: V4 0 0 0 0 0 0 1 0 1 Note V3 0 0 0 0 1 1 1 1 0 Note V2 0 0 1 1 0 1 0 0 0 Note V1 0 1 0 1 1 0 0 0 1 Note All unused logic states will turn all RF ports off. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Notes: 6. GND traces should be physically short and connected to ground plane for best performance. 7. Blocking capacitors needed only when non-zero DC voltage present. 8. Application must ensure at least 40 dB of voltage isolation from the RF signal. 9. Redundant antenna pads for flexible impedance matching. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Table 6. Ordering Information Order Code PE42693DTI PE42693DBI EK-42693-01 Package Wafer on Film Frame Die in Waffle Pack Evaluation Kit Shipping Method Wafer (Gross Die / Wafer Quantity) 238 Dice / Waffle Pack 1/ box Document No. 70-0231-01 www.psemi.com Contact sales@psemi.com for full version of datasheet (c)2007 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 4 GND V1 Switch control input, CMOS logic level 16 15 14 13 12 11 PE42693 Product Brief Sales Offices The Americas Peregrine Semiconductor Corporation 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Peregrine Semiconductor, Asia Pacific (APAC) Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Space and Defense Products Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). (c)2007 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 4 Document No. 70-0231-01 UltraCMOSTM RFIC Solutions Contact sales@psemi.com for full version of datasheet |
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